本文選題：圖形加速 + 算法架構(gòu)體系��； 參考：《西安電子科技大學(xué)》2013年碩士論文

【摘要】：在科學(xué)技術(shù)成為核心競爭力的今天，研制并掌握能滿足高性能圖形顯示和應(yīng)用需求的圖形加速引擎系統(tǒng)和技術(shù)，已成為我國國防和國家現(xiàn)代化發(fā)展的核心和戰(zhàn)略所在。所以大力開展以計(jì)算機(jī)圖形技術(shù)為核心的探索研究，，研制出具有完全自主知識(shí)產(chǎn)權(quán)的標(biāo)準(zhǔn)化和系列化的高端圖形顯示技術(shù)產(chǎn)品，具有戰(zhàn)略性意義。 本課題圍繞二維圖形加速算法的設(shè)計(jì)與實(shí)現(xiàn)，由圖形加速技術(shù)的歷史和國內(nèi)外發(fā)展現(xiàn)狀著手闡明了課題研究的實(shí)際意義和必要性，確定課題研究的方向和地位，分別從二維圖形加速的原理、總體系統(tǒng)架構(gòu)、圖元算法架構(gòu)、硬件體系架構(gòu)、圖元生成功能模塊、軟硬件協(xié)同設(shè)計(jì)、系統(tǒng)集成設(shè)計(jì)、基于SOPC可重構(gòu)硬件平臺(tái)和基于FPGA單芯片的二維圖形加速系統(tǒng)的設(shè)計(jì)和實(shí)現(xiàn)、圖形加速系統(tǒng)的功能驗(yàn)證和性能評價(jià)等方面進(jìn)行探索性技術(shù)研究。 本文的仿真和實(shí)驗(yàn)結(jié)果都驗(yàn)證了課題的設(shè)計(jì)和實(shí)現(xiàn)，大大提高了二維圖形生成的圖形加速功能，實(shí)現(xiàn)了基本滿足機(jī)載環(huán)境功能、性能要求的二維圖形加速系統(tǒng)，研制出了具有完全自主知識(shí)產(chǎn)權(quán)的二維圖形加速系統(tǒng)和技術(shù)。
[Abstract]:With science and technology becoming the core competitive power, developing and mastering graphics acceleration engine system and technology which can meet the demand of high performance graphics display and application has become the core and strategy of national defense and national modernization development. Therefore, it is of strategic significance to carry out the exploration and research on computer graphics technology as the core, and to develop standardized and serialized high-end graphics display products with completely independent intellectual property rights. This topic revolves around the design and realization of two-dimensional graphics acceleration algorithm, from the history of graphics acceleration technology and the development of domestic and foreign status, the paper expounds the practical significance and necessity of the research, determines the direction and status of the research. From the two dimensional graphics acceleration principle, the overall system architecture, the graph element algorithm architecture, the hardware system architecture, the graph element generation function module, the hardware and software co-design, the system integration design, The design and implementation of 2D graphics acceleration system based on SOPC reconfigurable hardware platform and FPGA single chip, the function verification and performance evaluation of graphics acceleration system are studied in this paper. The simulation and experimental results of this paper verify the design and implementation of the subject, greatly improve the graphics acceleration function of two-dimensional graphics generation, and realize the two-dimensional graphics acceleration system, which basically meets the requirements of airborne environment and performance. A two-dimensional graphics acceleration system and technology with completely independent intellectual property rights has been developed.
【學(xué)位授予單位】：西安電子科技大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2013
【分類號】：TP391.41

【參考文獻(xiàn)】

相關(guān)期刊論文 前1條

1 孔全存;李成貴;張鳳卿;;主飛行儀表圖形加速顯示系統(tǒng)的FPGA設(shè)計(jì)[J];電子技術(shù)應(yīng)用;2007年04期

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