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MRI梯度功率放大器硬件系統(tǒng)設(shè)計與分析

發(fā)布時間:2018-05-09 03:05

  本文選題:梯度功率放大器 + 控制電路設(shè)計。 參考:《電子科技大學(xué)》2013年碩士論文


【摘要】:隨著醫(yī)療水平的不斷提高,核磁共振成像設(shè)備已經(jīng)得到廣泛應(yīng)用。目前國內(nèi)醫(yī)療事業(yè)正在蓬勃發(fā)展,核磁共振成像設(shè)備一直依賴進口的狀況依然沒有改變。我國磁共振設(shè)技術(shù)水平跟發(fā)達國家相比還有很大差距,研制出具有自主知識產(chǎn)權(quán)的國產(chǎn)磁共振設(shè)備對我國醫(yī)療設(shè)備技術(shù)提高具有重要作用。 梯度功率放大器是磁共振成像系統(tǒng)核心部件之一。隨著磁共振成像技術(shù)的不斷提高,系統(tǒng)對梯度功放的性能提出了更高的要求。梯度功放研究已經(jīng)進行了多年,相關(guān)技術(shù)已經(jīng)逐漸成熟。但是同其他磁共振成像設(shè)備部件一樣,國內(nèi)梯度功放設(shè)備發(fā)展還相對落后。 本文根據(jù)需要進行了梯度功率放大器總體方案和關(guān)鍵模塊的硬件電路設(shè)計、調(diào)試。主要設(shè)計內(nèi)容包括: 1、本文根據(jù)梯度功率放大器在磁共振成像系統(tǒng)中的作用和主要結(jié)構(gòu),完成了梯度功率放大器電路設(shè)計方案。闡述IGBT門極電容、門極電荷、門極電阻的相關(guān)概念與設(shè)計要求,IGBT中大功率IGBT驅(qū)動模塊2SD315A的應(yīng)用。本文對梯度功率放大器主要執(zhí)行部件單元(電壓源逆變電路)數(shù)字控制相關(guān)原理和基本算法進行了闡述。 2、本文完成梯度功率放大器電路的數(shù)學(xué)模型。以電路狀態(tài)空間表達式為基礎(chǔ),給出帶參考輸入的線性二次最優(yōu)調(diào)節(jié)器設(shè)計過程,并使用Simulink對整個梯度功率放大器功能模塊進行仿真,驗證了梯度功率放大器設(shè)計方案合理性與可行性。使用前饋控制算法消除了輸出線性穩(wěn)態(tài)誤差。使用死區(qū)補償算法消除了死區(qū)時間帶來的非線性誤差。 3、根據(jù)IGBT全橋雙并聯(lián)電路和系統(tǒng)控制所需測量信號,給出了梯度功率放大器的控制部分功能框圖。詳細介紹了TMS320F28335、FPGA和AD7760芯片外圍電路設(shè)計。同時根據(jù)各個模塊接口特點完成信號調(diào)理電路設(shè)計。使用VHDL語言對AD7760采樣控制時序進行描述和邏輯設(shè)計。同時給出了對四路模數(shù)采樣數(shù)據(jù)進行浮點預(yù)處理的設(shè)計方案,可以充分利用FPGA的資源分擔(dān)數(shù)字信號處理器的工作。本文分析了控制硬件電路印制電路板布局布線和電磁兼容設(shè)計方法。 4、硬件調(diào)試部分以實際完成硬件電路為平臺,,對主要的信號調(diào)理電路性能進行調(diào)試,設(shè)計ModelSim仿真對高精模數(shù)采樣和浮點處理單元進行仿真驗證。使用Quartus II工具SignalTap II邏輯分析儀驗證AD7760采樣功能,實時觀察采樣數(shù)據(jù)波形。最后介紹了梯度功率放大器硬件調(diào)試平臺,給出了系統(tǒng)調(diào)試結(jié)果和性能分析。
[Abstract]:With the continuous improvement of medical level, NMR imaging equipment has been widely used. At present, the domestic medical industry is booming, MRI equipment has been dependent on imports of the situation remains unchanged. Compared with the developed countries, the level of magnetic resonance technology in China is still far from that in the developed countries. The development of domestic magnetic resonance equipment with independent intellectual property rights plays an important role in improving the technology of medical equipment in China. Gradient power amplifier is one of the core components of magnetic resonance imaging system. With the continuous improvement of magnetic resonance imaging technology, the performance of gradient power amplifier is required higher. Gradient power amplifier research has been carried out for many years, the related technology has gradually matured. However, like other MRI equipment components, the development of domestic gradient power amplifier equipment is relatively backward. In this paper, the general scheme of gradient power amplifier and the hardware circuit of key modules are designed and debugged according to the need. The main design contents include: 1. According to the function and the main structure of the gradient power amplifier in the magnetic resonance imaging system, the circuit design of the gradient power amplifier is completed. The related concepts and design requirements of IGBT gate capacitance, gate charge and gate resistance are described. In this paper, the principle and basic algorithm of digital control for the main executive unit of the gradient power amplifier (voltage source inverter circuit) are described. 2. The mathematical model of gradient power amplifier circuit is completed in this paper. Based on the expression of circuit state space, the design process of linear quadratic optimal regulator with reference input is given, and the whole function module of gradient power amplifier is simulated by Simulink. The rationality and feasibility of the gradient power amplifier design are verified. The feedforward control algorithm is used to eliminate the output linear steady-state error. The dead-time compensation algorithm is used to eliminate the nonlinear error caused by dead time. 3. According to the measurement signal of IGBT full bridge dual parallel circuit and system control, the control function block diagram of gradient power amplifier is given. The peripheral circuit design of TMS320F28335 FPGA and AD7760 chip is introduced in detail. At the same time, according to the characteristics of each module interface, the design of signal conditioning circuit is completed. The VHDL language is used to describe and design the AD7760 sampling control sequence. At the same time, the design scheme of floating-point preprocessing for four-channel analog-to-digital sampling data is given, which can make full use of the resources of FPGA to share the work of digital signal processor. This paper analyzes the layout, wiring and EMC design method of control hardware circuit printed circuit board. 4. In the hardware debugging part, the performance of the main signal conditioning circuit is debugged on the platform of the actual completed hardware circuit, and the ModelSim simulation is designed to simulate the high-precision analog-to-digital sampling and floating-point processing unit. The Quartus II tool SignalTap II logic analyzer is used to verify the AD7760 sampling function, and the sample data waveform is observed in real time. Finally, the hardware debugging platform of gradient power amplifier is introduced, and the system debugging results and performance analysis are given.
【學(xué)位授予單位】:電子科技大學(xué)
【學(xué)位級別】:碩士
【學(xué)位授予年份】:2013
【分類號】:TN722.75

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