本文選題：峰值保持電路 + 跨導(dǎo)運放　； 參考：《吉林大學(xué)》2017年碩士論文

【摘要】：峰值保持器,是一種能隨著輸入信號的值上升而上升,并且能將它的最大值維持一定時間,以便后續(xù)電子器件處理的電路。它在能譜檢測、激光測量系統(tǒng)、鋼水溫度測量系統(tǒng)、血壓測量等數(shù)據(jù)采集系統(tǒng)中都有不可或缺的作用。本論文從峰值保持電路的現(xiàn)狀出發(fā),說明了研究快速的峰值保持電路的必要性。接下來,全面闡述了峰值保持電路的主要理論,分析了這一電路的基本組成和工作原理。然后,在此基礎(chǔ)上,開始峰值保持器的設(shè)計。該電路由峰值保持電路模塊和放電電路模塊組成。其中,峰值保持電路模塊是由運算放大器、電壓緩沖器、電容器以及二極管等構(gòu)成;放電電路模塊是由電壓比較器、單穩(wěn)態(tài)觸發(fā)器以及開關(guān)場效應(yīng)管構(gòu)成。在峰值保持電路模塊的具體的電路設(shè)計中,考慮到輸入脈沖脈寬太小,選取了增益為+2的電壓緩沖器MAX4278。同時,為了實現(xiàn)電路的寬帶寬,選擇了帶寬很高的跨導(dǎo)運算放大器OPA861。為了提高峰值保持電路的積分非線性和降低電壓保持期間的下垂速率,我們選取了反向漏電流較小的Schottky二極管BAT17和絕緣電阻較大的聚苯乙烯電容器,同時在電壓緩沖器的前端又增加了一個簡單的跟隨器。對于放電電路模塊的設(shè)計,電壓比較器為LM361,單穩(wěn)態(tài)觸發(fā)器為HD74HC123,開關(guān)場效應(yīng)管為2N7000。最后,組成一個保持時間可調(diào)的自動放電電路。電路設(shè)計完成后,一方面,使用仿真軟件驗證了其工作性能;另一方面,使用示波器和多道分析儀測試了該電路的實際性能。測試結(jié)果表明,該電路的實測性能為:(1)輸入范圍為:0.2V到3.0V;(2)輸入信號最小上升時間為:10ns;(3)下垂速率小于10m V/us;(4)保持誤差小于等于10%;(5)積分非線性小于等于0.9%。
[Abstract]:Peak holder is a kind of circuit which can rise with the value of input signal and maintain its maximum value for a certain period of time for subsequent electronic device processing.It plays an indispensable role in energy spectrum measurement, laser measurement system, molten steel temperature measurement system, blood pressure measurement and other data acquisition systems.Based on the current situation of peak-holding circuit, this paper explains the necessity of studying fast peak-holding circuit.Then, the main theory of peak-holding circuit is expounded, and the basic composition and working principle of this circuit are analyzed.Then, on this basis, start the peak holder design.The circuit consists of peak holding circuit module and discharge circuit module.The peak-holding circuit module is composed of an operational amplifier, a voltage buffer, a capacitor and a diode, while the discharge circuit module is composed of a voltage comparator, a Monostable trigger and a switching field effect transistor.In the specific circuit design of peak-holding circuit module, considering that the pulse width of input pulse is too small, the voltage buffer MAX4278with gain of 2 is selected.At the same time, in order to realize the wide bandwidth of the circuit, OPA861, a transconductance operational amplifier with high bandwidth, is selected.In order to improve the integral nonlinearity of peak holding circuit and reduce the sag rate during voltage holding, we select Schottky diode BAT17 with low reverse leakage current and polystyrene capacitor with high insulation resistance.At the same time, a simple follower is added to the front end of the voltage buffer.For the design of discharge circuit module, the voltage comparator is LM361, the Monostable flip-flop is HD74HC123and the switching FET is 2N7000.Finally, an automatic discharge circuit with adjustable holding time is formed.After the circuit design is finished, on the one hand, the performance of the circuit is verified by simulation software; on the other hand, the actual performance of the circuit is tested by oscilloscope and multi-channel analyzer.
【學(xué)位授予單位】：吉林大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2017
【分類號】：TN702

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本文編號：1731821