非制冷紅外焦平面陣列信號(hào)處理電路的設(shè)計(jì)
發(fā)布時(shí)間：2018-09-19 19:35
【摘要】：紅外焦平面技術(shù)涉及的內(nèi)容包括紅外輻射的探測(cè)、轉(zhuǎn)變和使用。這種高科技的紅外技術(shù)，涵蓋了材料學(xué)、光學(xué)、MEMS和微電子等好多個(gè)方面，范圍非常廣。在國(guó)防的信息化和現(xiàn)代化進(jìn)程中，紅外技術(shù)的意義重大，很多民用領(lǐng)域也離不開它。紅外焦平面陣列(IRFPA)包括兩個(gè)部分，前端是探測(cè)器，后面接的是讀出電路。本次畢業(yè)設(shè)計(jì)內(nèi)容的重點(diǎn)是讀出電路的設(shè)計(jì)和后面調(diào)制器的設(shè)計(jì)。 非制冷紅外焦平面陣列作為目前低成本的第四代紅外熱成像器件，正在朝著二維大面陣的方向發(fā)展。多功能集成、系統(tǒng)的簡(jiǎn)易化、后續(xù)信號(hào)處理技術(shù)的增強(qiáng)將會(huì)越來越吸引研究人員的研究興趣。通過將供電模塊以及時(shí)序控制模塊和非制冷紅外焦平面陣列讀出電路實(shí)現(xiàn)系統(tǒng)單芯片集成，系統(tǒng)的集成度以及穩(wěn)定性將得到顯著提升，是未來非制冷紅外焦平面陣列的發(fā)展方向。 本文基于CTIA型讀出電路結(jié)構(gòu)，設(shè)計(jì)實(shí)現(xiàn)了1×8線列微測(cè)輻射熱計(jì)型焦平面陣列單芯片全集成型信號(hào)處理電路。仿真和測(cè)試驗(yàn)證表明，，所設(shè)計(jì)電路能夠完成預(yù)設(shè)功能。論文內(nèi)容安排如下：首先，介紹了非制冷紅外焦平面的基本概況；其次，針對(duì)微測(cè)輻射熱計(jì)型紅外焦平面陣列，確定其讀出電路總體架構(gòu)，給出了各模塊電路設(shè)計(jì)；再次，給出了信號(hào)處理后端所需的Sigma-Delta調(diào)制器設(shè)計(jì)，并進(jìn)行了系統(tǒng)聯(lián)調(diào)仿真驗(yàn)證；最后，對(duì)讀出電路模塊電路進(jìn)行了詳細(xì)測(cè)試并給出了未來紅外讀出電路設(shè)計(jì)的發(fā)展展望。 本文設(shè)計(jì)了一種紅外焦平面信號(hào)處理電路，基于中芯國(guó)際0.18μm CMOS工藝，采用CTIA型單元讀出電路結(jié)構(gòu)，實(shí)現(xiàn)了偏置模塊、驅(qū)動(dòng)信號(hào)源模塊、電流積分模塊、相關(guān)雙采樣模塊(CDS)、緩沖輸出模塊的單芯片集成,成功制造了1×8讀出電路原型。仿真結(jié)果表明，熱敏電阻與輸出電壓之間的線性度達(dá)到了99.94%，輸出穩(wěn)定，能很好地實(shí)現(xiàn)讀出功能，適合于大面陣移植。調(diào)制器的過采樣率為128，20kHz的帶寬，后仿真的信噪比能夠達(dá)到97dB。設(shè)計(jì)的三階Δ-Σ調(diào)制器采用中芯國(guó)際0.18μm CMOS工藝實(shí)現(xiàn)，1.8V的電源電壓下，功耗僅為480μW，為紅外焦平面陣列信號(hào)的并行讀取奠定了研究基礎(chǔ)。
[Abstract]:Infrared focal plane technology involves the detection, transformation and use of infrared radiation. This high-tech infrared technology covers a wide range of fields, such as materials science, optical MEMS and microelectronics. In the process of information and modernization of national defense, infrared technology is of great significance. The infrared focal plane array (IRFPA) consists of two parts: a detector at the front end and a readout circuit at the back. This graduation design focuses on the readout circuit design and the design of the rear modulator. As a low-cost fourth generation infrared thermal imaging device, uncooled infrared focal plane array is developing towards the direction of two-dimensional large plane array. The multifunctional integration, the simplification of the system and the enhancement of the subsequent signal processing technology will attract more and more researchers' interest. Through the integration of power supply module, timing control module and uncooled infrared focal plane array readout circuit, the integration and stability of the system will be greatly improved. Is the future uncooled infrared focal plane array development direction. Based on the structure of CTIA readout circuit, a 1 脳 8 line microbolometer single-chip signal processing circuit is designed and implemented in this paper. Simulation and test results show that the designed circuit can accomplish the preset function. The contents of the thesis are as follows: firstly, the basic situation of uncooled infrared focal plane is introduced; secondly, the overall structure of readout circuit is determined for the micro-bolometer infrared focal plane array, and the circuit design of each module is given. The design of Sigma-Delta modulator for the back end of signal processing is given, and the simulation of system coupling is carried out. Finally, the readout circuit module circuit is tested in detail and the development prospect of infrared readout circuit design in the future is given. In this paper, a kind of infrared focal plane signal processing circuit is designed. Based on SMIC 0.18 渭 m CMOS technology, the readout circuit structure of CTIA unit is adopted. The bias module, driving signal source module and current integral module are realized. The 1 脳 8 readout circuit prototype has been successfully fabricated by the single chip integration of the (CDS), buffer output module. The simulation results show that the linearity between the thermistor and the output voltage is 99.94, the output is stable, and the readout function can be realized well, which is suitable for the transplantation of large array. The over-sampling rate of the modulator is 128kHz and the post-simulated SNR can reach 97 dB. The designed third-order 螖-危 modulator uses the SMIC 0.18 渭 m CMOS process to realize the power consumption of only 480 渭 W at 1.8 V, which lays a foundation for parallel reading of the infrared focal plane array (IRFPA) signals.
【學(xué)位授予單位】：北京理工大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN219;TN911.7
本文編號(hào)：2251119
[Abstract]:Infrared focal plane technology involves the detection, transformation and use of infrared radiation. This high-tech infrared technology covers a wide range of fields, such as materials science, optical MEMS and microelectronics. In the process of information and modernization of national defense, infrared technology is of great significance. The infrared focal plane array (IRFPA) consists of two parts: a detector at the front end and a readout circuit at the back. This graduation design focuses on the readout circuit design and the design of the rear modulator. As a low-cost fourth generation infrared thermal imaging device, uncooled infrared focal plane array is developing towards the direction of two-dimensional large plane array. The multifunctional integration, the simplification of the system and the enhancement of the subsequent signal processing technology will attract more and more researchers' interest. Through the integration of power supply module, timing control module and uncooled infrared focal plane array readout circuit, the integration and stability of the system will be greatly improved. Is the future uncooled infrared focal plane array development direction. Based on the structure of CTIA readout circuit, a 1 脳 8 line microbolometer single-chip signal processing circuit is designed and implemented in this paper. Simulation and test results show that the designed circuit can accomplish the preset function. The contents of the thesis are as follows: firstly, the basic situation of uncooled infrared focal plane is introduced; secondly, the overall structure of readout circuit is determined for the micro-bolometer infrared focal plane array, and the circuit design of each module is given. The design of Sigma-Delta modulator for the back end of signal processing is given, and the simulation of system coupling is carried out. Finally, the readout circuit module circuit is tested in detail and the development prospect of infrared readout circuit design in the future is given. In this paper, a kind of infrared focal plane signal processing circuit is designed. Based on SMIC 0.18 渭 m CMOS technology, the readout circuit structure of CTIA unit is adopted. The bias module, driving signal source module and current integral module are realized. The 1 脳 8 readout circuit prototype has been successfully fabricated by the single chip integration of the (CDS), buffer output module. The simulation results show that the linearity between the thermistor and the output voltage is 99.94, the output is stable, and the readout function can be realized well, which is suitable for the transplantation of large array. The over-sampling rate of the modulator is 128kHz and the post-simulated SNR can reach 97 dB. The designed third-order 螖-危 modulator uses the SMIC 0.18 渭 m CMOS process to realize the power consumption of only 480 渭 W at 1.8 V, which lays a foundation for parallel reading of the infrared focal plane array (IRFPA) signals.
【學(xué)位授予單位】：北京理工大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN219;TN911.7
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本文編號(hào)：2251119
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