PCIe事務(wù)層及數(shù)據(jù)鏈路層的實現(xiàn)與驗證
[Abstract]:The bus is spread throughout the computer system, making all parts of the computer system a whole. It carries the effective information and transmits between different parts of the computer system. The functions of each part are integrated to complete the function of the system. With the increasing of computer speed, the performance of graphics card and memory CPU is developing rapidly, and bus is becoming the bottleneck of computer system performance. This topic comes from the research project fiber channel protocol chip development. The PCI bus, which is widely used in the industry, can provide the maximum bandwidth of 133MB / s, which can not meet the requirements of the chip, so the third generation PCI Express protocol is adopted in the design of the chip. PCIe bus based on PCI Express protocol has many excellent characteristics, such as high bandwidth, low delay, strong anti-interference, high expansibility, high reliability. Increased the ability to hang down, so that the performance of PCIe to a new level. What we have to do is to convert the theoretical advantage of PCI Express protocol into the advantage of practical application. This paper is divided into three parts: theory, realization and verification. In the theoretical part, the basic concept of PCI Express is introduced according to PCI Express protocol, and the basic functions of transaction layer and data link layer are emphatically introduced, as well as the composition and function of these two layers of data packets. In the realization part, PCI Express transaction layer and data link layer are basically realized according to PCI Express protocol, high performance, low delay as the target, according to the flow chart designed by IC. The design of transaction layer and data link layer is divided into two modules: sending module and receiving module, and some additional function modules, such as flow control, etc. Part of the emphasis of verification is the construction of verification platform. The verification platform built in this paper contains automatic detection module. The verification results are compared automatically and the efficiency of verification work is greatly reduced. At the same time, the PCI Express device can be used as the root complex and the endpoint device to work, so the reuse of the protocol code module in this verification platform reduces the difficulty of building the verification platform. Finally, the whole PCIe module is systematically verified, and good results are obtained.
【學位授予單位】:西安電子科技大學
【學位級別】:碩士
【學位授予年份】:2013
【分類號】:TP336
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