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GPS軟件接收機(jī)基帶信號(hào)處理單元的關(guān)鍵技術(shù)研究與實(shí)現(xiàn)

發(fā)布時(shí)間:2018-10-25 20:28
【摘要】:GPS全球衛(wèi)星定位系統(tǒng)因其在海、陸空三大領(lǐng)域的全球性、全天候、實(shí)時(shí)的提供導(dǎo)航定位服務(wù)而成為全球?qū)Ш叫l(wèi)星系統(tǒng)中的佼佼者,同時(shí)也是全球科研機(jī)構(gòu)炙手可熱的研究對(duì)象。GPS產(chǎn)品不斷擴(kuò)大的市場(chǎng)需求和其穩(wěn)定、強(qiáng)大的功能使各國(guó)不斷致力于對(duì)GPS導(dǎo)航定位算法及應(yīng)用平臺(tái)的開(kāi)發(fā)與研究,其中,對(duì)于GPS信號(hào)捕獲方法的研究尤其顯得必要。傳統(tǒng)的GPS信號(hào)捕獲方法在捕獲時(shí)間和資源消耗及電路復(fù)雜度上始終不能兩全其美,而GPS信號(hào)的捕獲又對(duì)其后的定位工作有著直接的影響,因而設(shè)計(jì)一種簡(jiǎn)單快速的GPS信號(hào)捕獲方法顯得尤為重要。 本課題主要完成的工作是對(duì)GPS軟件接收機(jī)的基帶信號(hào)處理單元中的信號(hào)捕獲部分提出一種新的簡(jiǎn)單快速的捕獲方法,同時(shí)對(duì)GPS信號(hào)的跟蹤、數(shù)據(jù)解析、定位解算等部分進(jìn)行研究,,并且在基于FPGA+DSP的硬件平臺(tái)上進(jìn)行實(shí)現(xiàn)。該接收機(jī)的基帶信號(hào)處理單元中的信號(hào)捕獲部分能夠?qū)鹘y(tǒng)捕獲方法中的時(shí)間消耗和資源消耗減少同時(shí)能夠完成GPS信號(hào)的快速捕獲,在1ms積分時(shí)間內(nèi)能得到一個(gè)多普勒頻率下的1023個(gè)碼相位對(duì)應(yīng)的相關(guān)值。在載波跟蹤部分使用四相鎖頻環(huán)和Costas環(huán)相結(jié)合的載波跟蹤環(huán)路對(duì)載波實(shí)現(xiàn)跟蹤調(diào)整,能夠同時(shí)滿足高動(dòng)態(tài)的運(yùn)動(dòng)模式和低信噪比的載波跟蹤捕獲。此外,對(duì)捕獲到的GPS信號(hào)進(jìn)行數(shù)據(jù)解調(diào),根據(jù)解調(diào)出的數(shù)據(jù)可以確定接收機(jī)位置。 將由天線接收到的信號(hào)進(jìn)行濾波、混頻、AD轉(zhuǎn)換等一系列操作后變?yōu)?位數(shù)字信號(hào)進(jìn)行相關(guān)處理。其中,通過(guò)Verilog HDL語(yǔ)言編程,實(shí)現(xiàn)GPS信號(hào)的復(fù)相位旋轉(zhuǎn)數(shù)字下變頻和C/A碼的捕獲,通過(guò)C編程實(shí)現(xiàn)GPS信號(hào)捕獲后的載波跟蹤、數(shù)據(jù)解調(diào)及定位解算設(shè)計(jì)工作。此時(shí),整個(gè)GPS信號(hào)基帶信號(hào)處理單元的工作基本完成,將該設(shè)計(jì)在現(xiàn)有的基于FPGA+DSP的硬件平臺(tái)上進(jìn)行驗(yàn)證實(shí)現(xiàn)并通過(guò)上位機(jī)顯示衛(wèi)星的捕獲跟蹤狀況,實(shí)時(shí)的對(duì)各衛(wèi)星的狀態(tài)進(jìn)行監(jiān)控。
[Abstract]:GPS Global Positioning system (GPS) has become a leader in GNSS because of its global, all-weather, real-time navigation and positioning services in the sea, land and air. At the same time, it is also a hot research object of global scientific research institutions. The expanding market demand and its stability of GPS products make all countries devote themselves to the development and research of GPS navigation and positioning algorithms and application platforms. The research of GPS signal acquisition method is especially necessary. The traditional method of GPS signal acquisition can not be used both ways in terms of acquisition time, resource consumption and circuit complexity. However, the acquisition of GPS signal has a direct impact on the subsequent positioning work. So it is very important to design a simple and fast GPS signal acquisition method. The main work of this thesis is to propose a new simple and fast acquisition method for the signal acquisition in the baseband signal processing unit of the GPS software receiver. At the same time, the GPS signal is tracked and analyzed. The location solution and other parts are studied and implemented on the hardware platform based on FPGA DSP. The signal acquisition section in the baseband signal processing unit of the receiver can reduce the time consumption and the resource consumption in the traditional acquisition method and can complete the fast acquisition of the GPS signal at the same time. The correlation values corresponding to 1023 code phases at a Doppler frequency can be obtained in 1ms integral time. In the part of carrier tracking, the carrier tracking loop combined with four-phase frequency locking loop and Costas loop is used to track and adjust the carrier, which can satisfy both the high dynamic motion mode and the low signal-to-noise ratio of the carrier tracking acquisition. In addition, the captured GPS signal is demodulated and the receiver position can be determined according to the demodulated data. The signals received by the antenna are filtered, mixed, and converted into 8-bit digital signals for correlation processing after a series of operations. Among them, the complex phase rotation digital down-conversion and C / A code acquisition of GPS signal are realized by Verilog HDL programming language, and the carrier tracking, data demodulation and positioning solution of GPS signal are realized by C programming. At this point, the work of the whole GPS signal baseband signal processing unit is basically completed, and the design is verified on the existing hardware platform based on FPGA DSP and the acquisition and tracking status of the satellite is displayed by the upper computer. Monitor the state of each satellite in real time.
【學(xué)位授予單位】:江蘇科技大學(xué)
【學(xué)位級(jí)別】:碩士
【學(xué)位授予年份】:2013
【分類號(hào)】:P228.4

【參考文獻(xiàn)】

相關(guān)期刊論文 前3條

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