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基于GPS馴服壓控晶體振蕩器的設計與實現(xiàn)

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【摘要】:頻率源的頻率穩(wěn)定度是衡量通信系統(tǒng)質量好壞的一個重要指標,以頻率穩(wěn)定度的測量時間間隔為區(qū)分可以把頻率穩(wěn)定度分為長期頻率穩(wěn)定度和短期頻率穩(wěn)定度,實際的高穩(wěn)頻率源系統(tǒng)通常需要同時具有優(yōu)秀的長期穩(wěn)定度和短期穩(wěn)定度。GPS是衛(wèi)星導航定位授時系統(tǒng),能夠給用戶提供導航、定位,授時等服務。晶體振蕩器的特點是具有好的短期穩(wěn)定度優(yōu)點。而GPS授時的頻率信號具有長期穩(wěn)定度好的特點。結合兩者的優(yōu)點,本文設計了一個基于GPS來校準壓控晶振的馴服技術。壓控晶振采用了基于SC切的晶體諧振器的設計,介紹了 SC切壓控晶振的構成,詳細講述了各部分的電路設計和工作原理,信號輸出為10MHz。本文設計的壓控晶振有體積小,成本低,功耗小諸多優(yōu)點。在馴服技術中,采用了一種基于鎖相環(huán)技術的時間間隔測量法。利用PLL產(chǎn)生均勻延遲的多路參考頻率信號,在由時間間隔形成的閘門下對其計數(shù),以計數(shù)值的平均數(shù)作為參考頻率計數(shù)值,降低了測量誤差。介紹了鎖相環(huán)原理,各組成模塊的功能特性及其線性化模型,并對鎖相環(huán)路的性能做了理論分析,為具體改進電路結構以提高環(huán)路性能提供了理論依據(jù)。然后,論文介紹了本設計各模塊的硬件設計。通過仿真實現(xiàn)GPS的1PPS與本地壓控晶振分頻產(chǎn)生的秒脈沖時間間隔的測量。軟件部分的設計用MSP430單片機和FPGA做為控制單元的核心。實現(xiàn)的時間間隔測量模塊具有分辨率精度高,穩(wěn)定性好的特點。基于上述技術,本文對基于GPS馴服壓控晶振的系統(tǒng)的設計和實現(xiàn)方式做了具體介紹。實際結果表明,利用GPS對壓控晶振VCXO進行馴服的讓長期穩(wěn)定度有一定程度的改善。最后對該頻率源系統(tǒng)的實驗結果進行分析,表明了該設計方案通過鎖相環(huán)合成GPS頻率信號和本地VCXO頻率信號以實現(xiàn)長期穩(wěn)定度和短期穩(wěn)定度皆優(yōu)的頻率源系統(tǒng)的可行性。
[Abstract]:The frequency stability of the frequency source is an important index to measure the quality of the communication system. The frequency stability can be divided into long term frequency stability and short term frequency stability according to the measurement time interval of frequency stability. Practical high-stability frequency source systems usually need both excellent long-term stability and short-term stability. GPS is a satellite navigation and positioning system which can provide users with navigation, positioning, timing and other services. Crystal oscillators are characterized by good short-term stability. The frequency signal of GPS timing has good long-term stability. Combining the advantages of the two, a taming technique based on GPS is designed to calibrate the voltage controlled crystal oscillator. The design of the crystal resonator based on SC is used in the voltage-controlled crystal oscillator. The structure of the SC voltage-controlled oscillator is introduced. The circuit design and working principle of each part are described in detail. The signal output is 10 MHz. The voltage controlled crystal oscillator designed in this paper has many advantages, such as small volume, low cost and low power consumption. In the taming technique, a time interval measurement method based on phase locked loop (PLL) is adopted. The multichannel reference frequency signal with uniform delay is generated by PLL and counted under the gate formed by the time interval. The average value of the count value is used as the reference frequency value to reduce the measurement error. This paper introduces the principle of PLL, the functional characteristics of each module and its linearization model, and makes a theoretical analysis of the performance of PLL, which provides a theoretical basis for improving the circuit structure and improving the performance of PLL. Then, the paper introduces the hardware design of each module. The measurement of the time interval between the 1PPS of GPS and the time interval of the second pulse produced by local voltage-controlled crystal oscillator is realized by simulation. Software part of the design using MSP430 MCU and FPGA as the core of the control unit. The time interval measurement module has the characteristics of high resolution precision and good stability. Based on the above technology, the design and implementation of the system based on GPS taming voltage controlled crystal oscillator are introduced in detail. The practical results show that the long term stability of VSCO VCXO is improved to some extent by using GPS to tame the VSCO. Finally, the experimental results of the frequency source system are analyzed, and it is shown that the design scheme is feasible to synthesize GPS frequency signal and local VCXO frequency signal by phase-locked loop to realize the frequency source system with both long-term and short-term stability.
【學位授予單位】:蘭州大學
【學位級別】:碩士
【學位授予年份】:2013
【分類號】:TN752;P228.4

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