發(fā)布時(shí)間：2019-05-19 23:51

【摘要】：模數(shù)轉(zhuǎn)換器是現(xiàn)代測(cè)量領(lǐng)域重要的電子器件。高精度模數(shù)轉(zhuǎn)換器按照結(jié)構(gòu)分類,通常包括逐次比較型、sigma-delt型、雙斜或多斜積分型以及電壓頻率型。論文研究了一種新型積分過(guò)采樣模數(shù)轉(zhuǎn)換器,該種結(jié)構(gòu)轉(zhuǎn)換器具有較高線性度,千赫茲級(jí)信號(hào)帶寬。它比通用集成模數(shù)轉(zhuǎn)換器具有更高的精度性能,而比起常見(jiàn)的高精度專用模數(shù)轉(zhuǎn)換器具有更高的采樣率,其適用于電能計(jì)量?jī)x器中,實(shí)現(xiàn)高精度電壓測(cè)量。為了驗(yàn)證積分過(guò)采樣理論的正確性以及該種結(jié)構(gòu)轉(zhuǎn)換器的可行性,論文設(shè)計(jì)了基于集成AD轉(zhuǎn)換器的專用型電壓測(cè)量或轉(zhuǎn)換電路,其構(gòu)成了積分過(guò)采樣模數(shù)轉(zhuǎn)換器。論文主要工作為:1.分析積分過(guò)采樣模數(shù)轉(zhuǎn)換器的電路結(jié)構(gòu)與工作過(guò)程,對(duì)經(jīng)典量化噪聲與過(guò)采樣理論進(jìn)行研究,推導(dǎo)出積分過(guò)采樣模數(shù)轉(zhuǎn)換器的信噪比公式以及臨界條件。2.分析積分過(guò)采樣模數(shù)轉(zhuǎn)換器的自校準(zhǔn)設(shè)計(jì)方法,研究迭代自校準(zhǔn)誤差項(xiàng)、電荷注入誤差項(xiàng)、集成ADC線性誤差項(xiàng)的校準(zhǔn)流程以及相應(yīng)補(bǔ)償方法。最后分析了補(bǔ)償放電時(shí)間誤差的兩種方法,分別為量化放電法與直接測(cè)量法。3.研究模數(shù)轉(zhuǎn)換器的測(cè)試?yán)碚�。首先分析模�?shù)轉(zhuǎn)換器測(cè)試需遵循的相干條件,然后分析了測(cè)量靜態(tài)誤差的直方圖測(cè)試法以及測(cè)量動(dòng)態(tài)精度的FFT測(cè)試法。最后使用matlab對(duì)模數(shù)轉(zhuǎn)換器的線性誤差、增益誤差、失調(diào)誤差建模,并對(duì)直方圖測(cè)試法以及FFT測(cè)試法進(jìn)行仿真驗(yàn)證。4.為驗(yàn)證積分過(guò)采樣理論正確性與可行性,設(shè)計(jì)與實(shí)現(xiàn)18位積分過(guò)采樣模數(shù)轉(zhuǎn)換器。該轉(zhuǎn)換器使用14位集成模數(shù)轉(zhuǎn)換器積分過(guò)采樣16倍,其具有雙極性輸入電壓范圍-2~+2 V,采樣率10 kHz。5.搭建測(cè)試平臺(tái),對(duì)該18位積分過(guò)采樣轉(zhuǎn)換器進(jìn)行測(cè)試。通過(guò)碼密度測(cè)試,得到靜態(tài)精度:最大DLE小于0.8 LSB,最大ILE小于4 LSB。通過(guò)FFT測(cè)試,得到動(dòng)態(tài)精度:噪聲和失真總和比為91.87 dB,信噪比為92.03 dB,總諧波失真比為-105.9 dB,無(wú)雜散動(dòng)態(tài)范圍為-107.3 dB,有效位數(shù)14.96。
[Abstract]:Analog-to-digital converter (ADC) is an important electronic device in the field of modern measurement. High precision analog-to-digital converters are classified according to structure, including successive comparison type, sigma- delt type, double oblique or multi-oblique integral type and voltage frequency type. In this paper, a new type of integral oversampling analog-to-digital converter is studied, which has high linearity and kilohertz signal bandwidth. Compared with the general integrated analog-to-digital converter, it has higher accuracy and higher sampling rate than the common high-precision special analog-to-digital converter. It is suitable for electric energy metering instruments to achieve high-precision voltage measurement. In order to verify the correctness of integral oversampling theory and the feasibility of this kind of structural converter, a special voltage measurement or conversion circuit based on integrated AD converter is designed in this paper, which constitutes an integral oversampling analog-to-digital converter. The main work of this paper is as follows: 1. The circuit structure and working process of integral oversampling analog-to-digital converter are analyzed, the classical quantitative noise and oversampling theory are studied, and the signal-to-noise ratio formula and critical condition of integral oversampling analog-to-digital converter are derived. 2. The self-calibration design method of integral oversampling analog-to-digital converter is analyzed, and the iterative self-calibration error term, charge injection error term, calibration flow of integrated ADC linear error term and corresponding compensation method are studied. Finally, two methods to compensate the discharge time error are analyzed, which are quantitative discharge method and direct measurement method. The test theory of analog-to-digital converter is studied. Firstly, the coherence conditions to be followed in the test of analog-to-digital converter are analyzed, and then the histogram test method for measuring static error and the FFT test method for measuring dynamic accuracy are analyzed. Finally, matlab is used to model the linear error, gain error and misalignment error of analog-to-digital converter, and the histogram test method and FFT test method are simulated and verified. 4. In order to verify the correctness and feasibility of integral oversampling theory, an 18-bit integral oversampling analog-to-digital converter is designed and implemented. The converter uses 14-bit integrated analog-to-digital converter to integrate oversampling 16 times. It has a bipolar input voltage range of-2 V and a sampling rate of 10 kHz.5.. The 18-bit integral oversampling converter is tested by building a test platform. Through the code density test, the static accuracy is obtained: the maximum DLE is less than 0.8 LSB, the maximum ILE is less than 4 LSB.. Through FFT test, the dynamic accuracy is as follows: the sum ratio of noise to distortion is 91.87 dB, the total harmonic distortion ratio is 92.03 dB, and the total harmonic distortion ratio is-105.9 dB,. The effective number of effective bits is-107.3 dB,.
【學(xué)位授予單位】：電子科技大學(xué)
【學(xué)位級(jí)別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN792

【參考文獻(xiàn)】

相關(guān)碩士學(xué)位論文 前2條

1 郝新超;數(shù)字直流納伏表關(guān)鍵技術(shù)研究[D];哈爾濱工業(yè)大學(xué);2007年

2 任鴻;一種新型模擬積分器設(shè)計(jì)[D];吉林大學(xué);2013年

，

本文編號(hào)：2481173