基于DSP的MODEM傳輸系統(tǒng)硬件PCB設(shè)計(jì)及信號(hào)完整性分析
發(fā)布時(shí)間：2018-12-17 10:00
【摘要】：短波通信是指利用波長為10～100米的無線電波進(jìn)行數(shù)據(jù)傳輸?shù)囊环N遠(yuǎn)距離通信方式。由于短波通信系統(tǒng)設(shè)備成本低,體積小,抗干擾能力強(qiáng)的特性,使短波通信廣泛應(yīng)用于軍事,海事,氣象等領(lǐng)域。 隨著微電子技術(shù),軟件無線電技術(shù)的發(fā)展,作為短波通信設(shè)備的核心部分,調(diào)制解調(diào)器向小型化,數(shù)字化,高速,高可靠有效性的方向發(fā)展。 本文在第三代通信協(xié)議MIL_STD_188_110C的基礎(chǔ)上,提出了高速串行調(diào)制解調(diào)器全新的硬件平臺(tái)架構(gòu)：雙核高性能DSP+FPGA。同時(shí)通過EDA電路仿真軟件設(shè)計(jì)硬件平臺(tái)高速電路,完成信號(hào)完整性分析。其主要工作如下。 1.基于對高速電路信號(hào)完整性理論的研究,介紹了常見的信號(hào)完整性問題,給出了解決信號(hào)完整性問題的措施,為設(shè)計(jì)高速電路提供理論依據(jù)。 2.統(tǒng)籌設(shè)計(jì)規(guī)劃硬件平臺(tái),將硬件平臺(tái)分為DSP,FPGA和音頻信號(hào)處理三個(gè)模塊,并圍繞三個(gè)模塊核心器件DSP,FPGA和音頻芯片的功耗,時(shí)鐘,以及外圍接口要求實(shí)現(xiàn)外圍電路的設(shè)計(jì)。根據(jù)系統(tǒng)功耗,上電時(shí)序等設(shè)計(jì)硬件平臺(tái)的電源網(wǎng)絡(luò)。 3.系統(tǒng)高速PCB設(shè)計(jì),分析系統(tǒng)高速信號(hào)線的信號(hào)完整性,并通過仿真軟件SigXplorer和Hyperlynx對高速信號(hào)線進(jìn)行仿真,給出仿真結(jié)果和改善信號(hào)質(zhì)量的方法。
[Abstract]:Short-wave communication is a kind of long-distance communication which uses radio waves of 10 ~ 100 meters. Shortwave communication system is widely used in military, maritime and meteorological fields because of its low cost, small volume and strong anti-jamming ability. With the development of microelectronic technology and software radio technology, as the core part of shortwave communication equipment, modem is developing towards miniaturization, digitalization, high speed, high reliability and efficiency. Based on the third generation communication protocol MIL_STD_188_110C, this paper proposes a new hardware platform architecture of high speed serial modem: dual core high performance DSP FPGA.. At the same time, the high-speed circuit of hardware platform is designed by EDA circuit simulation software, and the signal integrity analysis is completed. Its main work is as follows. 1. Based on the research on the theory of signal integrity in high-speed circuits, the common problems of signal integrity are introduced, and the measures to solve the problems are given, which provide the theoretical basis for the design of high-speed circuits. 2. The hardware platform is designed as a whole. The hardware platform is divided into three modules: DSP,FPGA and audio signal processing. The design of peripheral circuit is realized around the power consumption, clock and peripheral interface of DSP,FPGA and audio chip. According to the system power consumption, power sequence and other design hardware platform power supply network. 3. The high speed PCB of the system is designed to analyze the signal integrity of the high speed signal line of the system. The simulation results and the methods to improve the signal quality are given through the simulation software SigXplorer and Hyperlynx.
【學(xué)位授予單位】：北京郵電大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN41;TN911.6
本文編號(hào)：2384049
[Abstract]:Short-wave communication is a kind of long-distance communication which uses radio waves of 10 ~ 100 meters. Shortwave communication system is widely used in military, maritime and meteorological fields because of its low cost, small volume and strong anti-jamming ability. With the development of microelectronic technology and software radio technology, as the core part of shortwave communication equipment, modem is developing towards miniaturization, digitalization, high speed, high reliability and efficiency. Based on the third generation communication protocol MIL_STD_188_110C, this paper proposes a new hardware platform architecture of high speed serial modem: dual core high performance DSP FPGA.. At the same time, the high-speed circuit of hardware platform is designed by EDA circuit simulation software, and the signal integrity analysis is completed. Its main work is as follows. 1. Based on the research on the theory of signal integrity in high-speed circuits, the common problems of signal integrity are introduced, and the measures to solve the problems are given, which provide the theoretical basis for the design of high-speed circuits. 2. The hardware platform is designed as a whole. The hardware platform is divided into three modules: DSP,FPGA and audio signal processing. The design of peripheral circuit is realized around the power consumption, clock and peripheral interface of DSP,FPGA and audio chip. According to the system power consumption, power sequence and other design hardware platform power supply network. 3. The high speed PCB of the system is designed to analyze the signal integrity of the high speed signal line of the system. The simulation results and the methods to improve the signal quality are given through the simulation software SigXplorer and Hyperlynx.
【學(xué)位授予單位】：北京郵電大學(xué)
【學(xué)位級別】：碩士
【學(xué)位授予年份】：2015
【分類號(hào)】：TN41;TN911.6
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，本文編號(hào)：2384049
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