發(fā)布時間：2018-09-07 18:20

【摘要】：隨著集成電路規(guī)模的逐漸增大,當(dāng)前集成電路的互連線已經(jīng)達到數(shù)十萬級的規(guī)模,如此龐大的互連電路網(wǎng)絡(luò)已經(jīng)無法使用傳統(tǒng)的電路模擬工具進行有效的分析,互連線問題已經(jīng)成為制約集成電路發(fā)展的主要問題之一。因此利用模型降階技術(shù)對這樣的高階模型進行降階處理已經(jīng)成為了集成電路發(fā)展的關(guān)鍵。本文首先對大規(guī)�；ミB線模型的建模算法進行研究,利用改進的節(jié)點電壓法(MNA)對國際測試庫給出的互連線網(wǎng)絡(luò)建模,得到一個四輸入四輸出的980階模型,通過仿真后對該模型的性質(zhì)進行了分析。針對該模型文中主要利用以下三類模型降階算法進行降階,分別為1.SVD模型降階法;2.有理Krylov模型降階法;3.SVD-Krylov模型降階法。對基于SVD的平衡截斷方法(BR)、基于Krylov的矩匹配法(RK)這兩種傳統(tǒng)的模型降階算法進行了詳細的研究,并且利用這兩種算法分別對CDPLayer模型、Iss模型進行降階,從而得到這兩種算法的降階性質(zhì)。綜合這兩種算法的特質(zhì)以及優(yōu)勢后,本文引出了最小二乘法(LS),該方法可以說是一種SVD-Krylov算法。在最小二乘法的基礎(chǔ)上,通過引入平移算子,提出了等式約束最小二乘法(ECLS),該算法可以使得降階模型能夠準確的匹配原高階模型的前r+i個模,并且對其余的高階項也采用了最小二乘逼近的方式,從而大大提高了降階精度(這里r表示降階后模型的階數(shù),i為非負整數(shù),1≤ir)。分別利用上述四種算法將建立的互連線模型降階至30階,通過仿真對比,使用本文提出的ECLS算法對大規(guī)�；ミB線模型進行降階,能夠使降階模型更好的與原模型相匹配,降低了降階帶來的誤差,大大縮短了降階時間,證實了該方法的有效性。
[Abstract]:With the increasing scale of integrated circuits, the interconnection of integrated circuits has reached the scale of hundreds of thousands of levels, so it is impossible for such a large interconnect circuit network to use traditional circuit simulation tools for effective analysis. Interconnection problem has become one of the main problems restricting the development of integrated circuits. Therefore, the use of model reduction technology to reduce the order of such high-order models has become the key to the development of integrated circuits. In this paper, the modeling algorithm of large-scale interconnection model is studied, and a 980th order model with four inputs and four outputs is obtained by using the improved nodal voltage method (MNA) to model the interconnect network provided by the international test library. The properties of the model are analyzed by simulation. In this paper, we mainly use the following three models to reduce the order of the model, respectively, 1.SVD model reduction algorithm. The rational Krylov model reduction method is used to reduce the order of SVD-Krylov model. In this paper, two traditional model order reduction algorithms, (RK) based on Krylov, are studied in detail, which are the balanced truncation method based on SVD. The two algorithms are used to reduce the order of CDPLayer model. The order reduction properties of these two algorithms are obtained. After synthesizing the characteristics and advantages of the two algorithms, this paper leads to the least square method (LS), which can be said to be a SVD-Krylov algorithm. On the basis of the least square method, by introducing the translation operator, the equal-constrained least square method (ECLS),) is proposed. The algorithm can make the reduced-order model match the first Ri modules of the original high-order model accurately. The other higher order terms are also approximated by least square method, which greatly improves the order reduction accuracy (where r denotes that the order I of the reduced order model is a non-negative integer n 1 鈮，

本文編號：2229053